|Category||Semiconductors => Switches and Multiplexers => Buffered Encoders and Decoders|
|Part family||SN74HC42 4-Line To 10-Line Decoders (1 of 10)|
|Description||4-Line To 10-Line Decoders (1 of 10) 16-SOIC -40 to 85|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN74HC42 datasheet
|Cross ref.||Similar parts: CD74HC4511H, CD74HC4514H, CD74HC4515H, CD74HC4543H, CD74HCT4511H, CD74HCT4514H, CD74HCT4515H, CD74HCT4543H, CD74HC42EX, CD74HC42E|
|Output Drive (IOL/IOH)(Max)(mA)||5.2/-5.2|
|Approx. Price (US$)||0.28 | 1ku|
|ICC @ Nom Voltage(Max)(mA)||0.08|
|F @ Nom Voltage(Max)(Mhz)||28|
|Operating Temperature Range(C)||-40 to 85|
|tpd @ Nom Voltage(Max)(ns)||38|
|ESD Charged Device Model(kV)||0.75|
|Digital input leakage(Max)(uA)||5|
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
Wide Operating Voltage Range 6 V Outputs Can Drive To 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd ns ±4-mA Output Drive 5 V
Low Input Current 1 µA Max Full Decoding of Input Logic All Outputs Are High for Invalid BCD Conditions Also for Applications to 8-Line Decoders
These decimal decoders consist of eight inverters and ten 4-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that all inputs remain off for all invalid input conditions. ORDERING INFORMATION
TA PDIP to 85°C SOIC D SOP NS CDIP to 125°C CFP W LCCC FK PACKAGE Tube Tape and reel Tape and reel Tube ORDERABLE PART NUMBER SNJ54HC42W SNJ54HC42FK TOP-SIDE MARKING SNJ54HC42J SNJ54HC42W
SNJ54HC42FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC. 7 V Input clamp current, IIK (VI VI > VCC) (see Note ±20 mA Output clamp current, IOK (VO VO > VCC) (see Note ±20 mA Continuous output current, IO (VO 0 to VCC). ±25 mA Continuous current through VCC or GND. ±50 mA Package thermal impedance, JA (see Note 2): D package. 73°C/W N package. 67°C/W NS package. 64°C/W Storage temperature range, Tstg. to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
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