Details, datasheet, quote on part number: SN74ABT3611PQ
PartSN74ABT3611PQ
CategoryMemory
Description64 36 Clocked First-in, First-out Memory
CompanyTexas Instruments, Inc.
DatasheetDownload SN74ABT3611PQ datasheet
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Features, Applications

Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 36 Clocked FIFO Buffering Data From Port A to Port B Mailbox-Bypass Register In Each Direction Programmable Almost-Full and Almost-Empty Flags Microprocessor Interface Control Logic Full Flag and Almost-Full Flag Synchronized by CLKA

Empty Flag and Almost-Empty Flag Synchronized by CLKB Passive Parity Checking on Each Port Parity Generation Can Be Selected for Each Port Low-Power Advanced BiCMOS Technology Supports Clock Frequencies to 67 MHz Fast Access Times 10 ns Package Options Include 120-Pin Thin Quad Flat (PCB) and 132-Pin Plastic Quad Flat (PQ) Packages

description

The is a high-speed, low-power BiCMOS clocked FIFO memory. It supports clock frequencies to 67 MHz and has read access times as fast as 10 ns. 36 dual-port SRAM FIFO buffers data from port A to port B. The FIFO has flags to indicate empty and full conditions and two programmable flags (almost full and almost empty) to indicate when a selected number of words is stored in memory. Communication between each port takes place through two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. Parity is checked passively on each port and can be ignored if not desired. Parity generation can be selected for data read from each port. Two or more devices are used in parallel to create wider datapaths. The is a clocked FIFO, which means each port employs a synchronous interface. All data transfers through a port are gated to the low-to-high transition of a port clock by enable signals. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. The full flag (FF) and almost-full (AF) flag of the FIFO are two-stage synchronized to the port clock that writes data to its array (CLKA). The empty flag (EF) and almost-empty (AE) flag of the FIFO are two-stage synchronized to the port clock that reads data from its array. The SN74ABT3611 is characterized for operation from to 70C. For more information on this device family, see the following application reports:

FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control (literature number SCAA007) Parity-Generate and Parity-Check Features for High-Bandwidth-Computing FIFO Applications (literature number SCAA015)

Metastability Performance of Clocked FIFOs (literature number SCZA004)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

AFA FFA CSA ENA CLKA W/RA VCC PGA PEFA GND MBF2 MBA FS1 FS0 ODD/EVEN RST GND NC MBB MBF1 GND PEFB PGB VCC W/RB CLKB ENB CSB NC


 

Some Part number from the same manufacture Texas Instruments, Inc.
SN74ABT3612 Clocked Bidirectional Fifo: 64x36x2
SN74ABT3612-15PCB ti SN74ABT3612, 64 X 36 X 2 Bidirectional Synchronous Fifo Memory
SN74ABT3612-20 Clocked Bidirectional Fifo: 64x36x2
SN74ABT3612-20PCB ti SN74ABT3612, 64 X 36 X 2 Bidirectional Synchronous Fifo Memory
SN74ABT3612-30 Clocked Bidirectional Fifo: 64x36x2
SN74ABT3612-30PCB ti SN74ABT3612, 64 X 36 X 2 Bidirectional Synchronous Fifo Memory
SN74ABT3612PCB 64 36 2 Clocked Bidirectional First-in, First-out Memory
SN74ABT3613 Clocked Fifo With Bus Matching And Byte Swapping: 64x36
SN74ABT3613-15PCB ti SN74ABT3613, 64 X 36 Synchronous Fifo Memory
SN74ABT3613-20 Clocked Fifo With Bus Matching And Byte Swapping: 64x36
SN74ABT3613-20PCB ti SN74ABT3613, 64 X 36 Synchronous Fifo Memory
SN74ABT3613-30 Clocked Fifo With Bus Matching And Byte Swapping: 64x36
SN74ABT3613-30PCB ti SN74ABT3613, 64 X 36 Synchronous Fifo Memory
SN74ABT3613PCB 64 36 Clocked First-in, First-out Memory With Bus Matching And Byte Swapping
SN74ABT3614 64x36x2 Clocked Bidirectional First-in, First-out Memory With Bus Matching And Byte Swapping
SN74ABT3614-15PCB ti SN74ABT3614, 64 X 36 X 2 Bidirectional Synchronous Fifo Memory
SN74ABT3614-20 64x36x2 Clocked Bidirectional First-in, First-out Memory With Bus Matching And Byte Swapping
SN74ABT3614-20PCB ti SN74ABT3614, 64 X 36 X 2 Bidirectional Synchronous Fifo Memory
SN74ABT3614-30 64x36x2 Clocked Bidirectional First-in, First-out Memory With Bus Matching And Byte Swapping
SN74ABT3614-30PCB ti SN74ABT3614, 64 X 36 X 2 Bidirectional Synchronous Fifo Memory
SN74ABT3614PCB 64 36 2 Clocked Bidirectional First-in, First-out Memory With Bus Matching And Byte Swapping

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