Details, datasheet, quote on part number: SN74ABT32501PZ
CategoryLogic => Transceivers => Universal Bus Transceivers (UBTs)
TitleUniversal Bus Transceivers (UBTs)
Descriptionti SN74ABT32501, 36-Bit Universal Bus Transceivers With 3-State Outputs
CompanyTexas Instruments, Inc.
DatasheetDownload SN74ABT32501PZ datasheet
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Features, Applications

Members of the Texas Instruments Widebus + TM Family State-of-the-Art EPIC-B TM BiCMOS Design Significantly Reduces Power Dissipation UBT TM (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode ESD Protection Exceeds 2000 V per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model = 200 pF, = 0) Latch-Up Performance Exceeds 500 mA per JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) V at VCC = 25°C Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise High-Drive Outputs 32-mA IOH, 64-mA IOL ) Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Packaged in 100-Pin Plastic Thin Quad Flat (PZ) Package With × 14-mm Body Using 0.5-mm Lead Pitch

Widebus+, EPIC-B, and UBT are trademarks of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303


These 36-bit UBTs combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Data flow for A is similar to that to B, but uses OEBA, LEBA, and CLKBA. Output-enable OEAB is active high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. The output enables are complementary (OEAB is active high, and OEBA is active low). To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver (B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver (A to B). Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ABT32501 is characterized for operation over the full military temperature range to 125°C. The SN74ABT32501 is characterized for operation from to 85°C.


A-to-B data flow is shown: B-to-A flow is similar, but uses OEBA, LEBA, and CLKBA. Output level before the indicated steady-state input conditions were established § Output level before the indicated steady-state input conditions were established, provided that CLKAB was low before LEAB went low


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