|Category||Logic => Counters => Binary Counters|
|Description||Synchronous 4-bit Up/down Decade And Binary Counters With 3-state Outputs|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN54ALS569AFK datasheet
|SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS
3-State Q Outputs Drive Bus Lines Directly Counter Operation Independent of 3-State Output Fully Synchronous Clear, Count, and Load Asynchronous Clear Is Also Provided Fully Cascadable Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPsdescription
The SN74ALS568A decade counter and ALS569A binary counters are programmable, count up or down, and offer both synchronous and asynchronous clearing. All synchronous functions are executed on the positive-going edge of the clock (CLK) input. The clear function is initiated by applying a low level to either asynchronous clear (ACLR) or synchronous clear (SCLR). Asynchronous (direct) clearing overrides all other functions of the device, while synchronous clearing overrides only the other synchronous functions. Data is loaded from the B, C, and D inputs by holding load (LOAD) low during a positive-going clock transition. The counting function is enabled only when enable P (ENP) and enable T (ENT) are low and ACLR, SCLR, and LOAD are high. The up/down (U/D) input controls the direction of the count. These counters count up when U/D is high and count down when U/D is low.
A high level at the output-enable (OE) input forces the Q outputs into the high-impedance state, and a low level enables those outputs. Counting is independent of OE. ENT is fed forward to enable the ripple-carry output (RCO) to produce a low-level pulse while the count is zero (all Q outputs low) when counting down or maximum or 15) when counting up. The clocked carry output (CCO) produces a low-level pulse for a duration equal to that of the low level of the clock when RCO is low and the counter is enabled (both ENP and ENT are low); otherwise, CCO is high. CCO does not have the glitches commonly associated with a ripple-carry output. Cascading is normally accomplished by connecting RCO or CCO of the first counter to ENT of the next counter. However, for very high-speed counting, RCO should be used for cascading since CCO does not become active until the clock returns to the low level. The SN54ALS569A is characterized for operation over the full military temperature range to 125°C. The SN74ALS568A and SN74ALS569A are characterized for operation from to 70°C.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.SN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS
FUNCTION TABLE INPUTS OE ACLR SCLR LOAD ENT ENP U/D CLK OPERATION Q outputs disabled Asynchronous clear Synchronous clear Load Count up Count down Inhibit count Inhibit countSN74ALS568A, SN74ALS569A SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS WITH 3-STATE OUTPUTS
17 OE U/D CLK 2 12 ENT ENP SCLR LOAD 8 ACLR EN10 M1 [UP] M2 [DOWN] 5CT=0 M3 [LOAD] M4 [COUNT] 18 19
17 OE U/D CLK 2 12 ENT ENP SCLR LOAD 8 ACLR EN10 M1 [UP] M2 [DOWN] 5CT=0 M3 [LOAD] M4 [COUNT] 18 19
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
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