|Category||Logic => Buffers/Inverters => 3-State|
|Description||Synchronous 4-bit Counters With 3-state Outputs|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN54ALS561A datasheet
Carry Output for n-Bit Cascading Buffer-Type Outputs Drive Bus Lines Directly Choice of Asynchronous or Synchronous Clearing and Loading Internal Look-Ahead Circuitry for Fast Cascading Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPsdescription
These binary counters are programmable and offer synchronous and asynchronous clearing as well as synchronous and asynchronous loading. All synchronous functions are executed on the positive-going edge of the clock. The clear function is initiated by applying a low level to either asynchronous clear (ACLR) or synchronous clear (SCLR). ACLR (direct clear) overrides all other functions of the device, while SCLR overrides only the other synchronous functions. Data is loaded from the B, C, and D inputs by applying a low level to asynchronous load (ALOAD) or by the combination of a low level at synchronous load (SLOAD) and a positive-going clock transition. The counting function is enabled only when enable P (ENP), enable T (ENT), ACLR, ALOAD, SCLR, and SLOAD are all high.
A high level at the output-enable (OE) input forces the Q outputs into the high-impedance state, and a low level enables those outputs. Counting is independent of OE. ENT is fed forward to enable the ripple-carry output (RCO) to produce a high-level pulse while the count is maximum (15). The clocked carry output (CCO) produces a high-level pulse for a duration equal to that of the low level of the clock when RCO is high and the counter is enabled (ENP and ENT are high); otherwise, CCO is low. CCO does not have the glitches commonly associated with a ripple-carry output. Cascading is normally accomplished by connecting RCO or CCO of the first counter to ENT of the next counter. However, for very high-speed counting, RCO should be used for cascading because CCO does not become active until the clock returns to the low level. The SN54ALS561A is characterized for operation over the full military temperature range to 125°C. The SN74ALS561A is characterized for operation from to 70°C.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
FUNCTION TABLE INPUTS OE ACLR ALOAD SCLR SLOAD ENT ENP CLK OPERATION Q outputs disabled Asynchronous clear Asynchronous load Synchronous clear Synchronous load Count Inhibit counting Inhibit counting
17 OE ENT ENP SCLR SLOAD CLK G2 6CT=0 [SYNC CLR] M3 [COUNT] M4 [SYNC LOAD] M5 [COUNT] Z7 8 ACLR 1 ALOAD (CT=15) G9 CCO RCO QD CTRDIV16This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
|Related products with the same datasheet|
|Some Part number from the same manufacture Texas Instruments, Inc.|
|SN54ALS561AFK Synchronous 4-bit Counters With 3-state Outputs|
|SN54ALS563A Octal D-type Transparent Latches With 3-state Outputs|
|SN54ALS563BJ ti SN54ALS563B, Octal D-type Transparent Latches With 3-State Outputs|
|SN54ALS563BW Octal D-type Transparent Latches With 3-state Outputs|
|SN54ALS564AJ ti SN54ALS564A, Octal D-type Edge-triggered Flip-flops With 3-State Outputs|
|SN54ALS564B Octal D-type Edge-triggered Flip-flop With 3-state Outputs|
|SN54ALS564BFK Octal D-type Edge-triggered Flip-flops With 3-state Outputs|
|SN54ALS564BJ ti SN54ALS564B, Octal D-type Edge Triggered Flip-flops With 3-state Outputs|
|SN54ALS564BW Octal D-type Edge-triggered Flip-flops With 3-state Outputs|
|SN54ALS569AFK Synchronous 4-bit Up/down Decade And Binary Counters With 3-state Outputs|
|SN54ALS569AJ ti SN54ALS569A, Synchronous 4-Bit Up/down Binary Counters With 3-State Outputs|
|SN54ALS573CFK Octal D-type Transparent Latches With 3-state Outputs|
|SN54ALS573CJ ti SN54ALS573C, Octal D-type Transparent Latches With 3-State Outputs|
|SN54ALS573CW Octal D-type Transparent Latches With 3-state Outputs|
|SN54ALS574BFK Octal D-type Edge-triggered Flip-flops With 3-state Outputs|
|SN54ALS574BJ ti SN54ALS574B, Octal D-type Edge-triggered Flip-flops With 3-State Outputs|
OPA277UA/2K5 : ti OPA277, High Precision Operational Amplifiers
PCI1250APEF : CardBus Controllers ti PCI1250A, Dual Socket Cardbus Controller
SN74LVCZ245ADGV : Octal Bus Transceiver With 3-state Outputs
SN74LVTH16646DL : Registered Transceivers ti SN74LVTH16646, 3.3 V Abt 16-Bit Bus Transceivers With 3-State Outputs
TLE2072MUB : ti TLE2072, Dual Low-noise High-speed JFET-input Operational Amplifier
TPS73HD318PWP : ti TPS73HD318, Dual Output Low-dropout (LDO) Voltage Regulator
TMP320LC2407AVFS : DSP Controllers
TPS78628KTTTG3 : Ultralow-noise, High-psrr, Fast, RF, 1.5-a Low-dropout Linear Regulators
TM124FBK32S-80 : Dynamic RAM Modules
SN74F240DWG4 : Logic - Gate And Inverter Integrated Circuit (ics) Inverter Tube 15mA, 64mA 4.5 V ~ 5.5 V; IC INVERTER DUAL 4-INPUT 20SOIC Specifications: Number of Circuits: 2 ; Package / Case: 20-SOIC (0.295", 7.50mm Width) ; Logic Type: Inverter ; Packaging: Tube ; Mounting Type: Surface Mount ; Number of Inputs: 4 ; Current - Output High, Low: 15mA, 64mA ; Operating Temperature: 0°C ~ 70°C ; Voltage - Supply: 4.5 V ~ 5.5 V ; Lead F
REF6125IDGKT : IC VREF SERIES 2.5V 8VSSOP Texas Instruments' REF61xx family of voltage references have an integrated low output impedance buffer that enables the user to directly drive the REF pin of precision data converters while preserving linearity, distortion, and noise performance. Most precision SAR, and delta-sigma ADCs, switch b
54F192FM : Up/down Decade Counter With Separate Up/down Clocks. 74F192 Up Down Decade Counter with Separate Up Down Clocks 74F192 Up Down Decade Counter with Separate Up Down Clocks The an up down BCD decade (8421) counter Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously The outputs change state synchronously with the LOW-toHIGH transitions on the clock.
74ACT11194DW : ti 74ACT11194, 4-Bit Bidirectional Universal Shift Registers. Inputs Are TTL-Voltage Compatible Parallel-to-Serial, Serial-to-Parallel Conversions Left or Right Shifts Parallel Synchronous Loading Direct Overriding Clear Temporary Data Latching Capability Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity.
74F366 : Bipolar->F Family. Hex Inverter/buffer With 3-STATE Outputs. s 3-STATE buffer outputs sink mA s High-speed s Bus-oriented s High impedance npn base inputs for reduced loading Order Number 74F368SJ 74F368PC Package Number M16D N16E Package 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 16-Lead Small Outline Integrated.
CD74HCT354E : Multiplexers. ti CD74HCT354, High Speed CMOS Logic 8-Input Multiplexer/register With 3-State Outputs.
HCC4001B : NOR GATE. 4000BDUAL 3 INPUT PLUS INVERTER 4001BQUAD 2 INPUT 4002B-DUAL 4 INPUT 4025B TRIPLE 3 INPUT micropackage. The HCC/HCF4000B, HCC/HCF4001B, HCC/HCF 4002B and HCC/HCF4025B nor gate provide the system designer with direct implementation of the nor function and supplement the existing family of COS/MOS gates. All inputs and outputs are buffered. PROPAGATION.
HD74LV1GW98A : uni-Logic->74LV1GW-A. Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp. The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips.
MC74ACT158D : Quad 2-input Multiplexer. The is a high-speed quad 2-input multiplexer. It selects four bits of data from two sources using the common Select and Enable inputs. The four buffered outputs present the selected data in the inverted form. The MC74AC158/74ACT158 can also be used as a function generator. Outputs Source/Sink 24 mA ACT158 Has TTL Compatible Inputs QUAD 2-INPUT MULTIPLEXER.
MC74LCX541DT : Buffers. Low-voltage CMOS Octal Buffer Flow Through Pinout , Package: Tssop, Pins=20.
SN54LS597FK : 8-bit Shift Registers With Input Latches.
SN54LV132AFK : Quadruple Positive-nand Gates With Schmitt-trigger Inputs. SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS EPIC TM (Enhanced-Performance Implanted CMOS) Process Typical VOLP (Output Ground Bounce) V at VCC, = 25°C Typical VOHV (Output VOH Undershoot) V at VCC, = 25°C Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds.
SN74AS230A : Bus Oriented Circuits. Octal Buffer/driver With 3-state Outputs. True and Complementary Outputs 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers High Capacitive-Drive Capability Current-Sinking Capability 64 mA Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs This octal buffer/driver is designed specifically 10 11 improve the performance of 3-state.
SN74BCT245DB : Octal Bus Transceivers With 3-state Outputs. State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic.
SN74LS273 : Bipolar->LS Family. Octal D Flip-flop With Master Reset. Contains Eight Flip-Flops With Single-Rail Outputs Buffered Clock and Direct Clear Inputs Individual Data Input to Each Flip-Flop Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators These monolithic, positive-edge-triggered flipflops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information.
SN74LS47D : Decoders. ti SN74LS47, Bcd-to-seven-segment Decoders/drivers. PRODUCTION DATA information is current as of publication date. Products conform to s per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. .
SN74LVCH16543ADGGR : Registered Transceivers. ti SN74LVCH16543A, 16-Bit Registered Transceiver With 3-State Outputs.
TC4S11F : 4000-series Equiv. (TC4Sxx, TC4Wxx). Function = NAND ;; Package = SMV.
TC7SL02 : CMOS/BiCMOS->AC/ACT Family. 2-input NOR GATE.
SN74LVC07A-EP : Enhanced Product Hex Buffer/Driver With Open-Drain Output This hex buffer/driver is designed for 1.65-V to 5.5-V VCC operation. The outputs of the SN74LVC07A device are open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA. Inputs can be driven.
SN74LV14ADBE4 : LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14. s: Gate Type: NOT ; Supply Voltage: 2.5V ; Logic Family: CMOS ; Inputs: 1 ; Propagation Delay: 27 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F) ; Pin Count: 14.