Details, datasheet, quote on part number: SN54ALS374AJ
PartSN54ALS374AJ
CategorySemiconductors => Space & High Reliability => Logic Products => Flip-Flop/Latch/Registers
Part familySN54ALS374A Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs
TitleD-Type (3-State) Flip-Flops
DescriptionOctal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-CDIP -55 to 125
CompanyTexas Instruments, Inc.
StatusACTIVE
ROHSSee ti.com
SampleNo
DatasheetDownload SN54ALS374AJ datasheet
Cross ref.Similar parts: DM74ALS374N
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Specifications 
3-State OutputYes
Output TypeTTL
Bits(#)8
Technology FamilyALS
RatingMilitary
ICC @ Nom Voltage(Max)(mA)31
Package GroupCDIP,CFP,LCCC
Output Drive (IOL/IOH)(Max)(mA)24/-2.6
Operating Temperature Range(C)-55 to 125
Input TypeTTL
VCC(Max)(V)5.5
F @ Nom Voltage(Max)(Mhz)75
VCC(Min)(V)4.5
tpd @ Nom Voltage(Max)(ns)16
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
20JCDIPR-GDIP-T1TUBESN54ALS374AJ 6.9224.24.572.54
Application notes
• Advanced Schottky (ALS and AS) Logic Families
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using | Doc

 

Features, Applications
SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

D-Type Flip-Flops in a Single Package With 3-State Bus Driving True Outputs Full Parallel Access for Loading Buffered Control Inputs Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs

description

These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS374A and SN54AS374 are characterized for operation over the full military temperature range to 125C. The SN74ALS374A and SN74AS374 are characterized for operation from to 70C.

FUNCTION TABLE (each flip-flop) INPUTS OE CLK H or OUTPUT Q0 Z

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, VCC. 7 V Input voltage range, VI. 7 V Voltage applied to a disabled 3-state output. 5.5 V Package thermal impedance, JA (see Note 1): DW package. 58C/W N package. 69C/W Storage temperature range, Tstg. to 150C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51.

SN54ALS374A MIN VCC VIH VIL IOH IOL TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Operating free-air temperature NOM 5 MAX 5.5 SN74ALS374A MIN NOM 5 MAX 5.5 UNIT mA C

SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

Outputs disabled All typical values are at VCC = 25C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

timing requirements over recommended operating free-air temperature range (unless otherwise noted)

SN54ALS374A MIN fclock tw tsu th Clock frequency Pulse duration Setup time Hold time CLK high or low Data before CLK Data after CLK 10 4 MAX SN74ALS374A MIN MAX 35 UNIT MHz ns

switching characteristics over recommended operating conditions (unless otherwise noted (see Figure 3)

PARAMETER fmax tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) SN54ALS374A MIN 30 CLK OE MAX SN74ALS374A MIN MAX UNIT MHz ns


 

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