|Category||Logic => Latches|
|Description||8-bit Addressable Latches|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN54ALS259FK datasheet
8-Bit Parallel-Out Storage Register Performs Serial-to-Parallel Conversion With Storage Asynchronous Parallel Clear Active-High Decoder Enable/Disable Input Simplifies Expansion Expandable for n-Bit Applications Four Distinct Functional Modes Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPsdescription
These 8-bit addressable latches are designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers, and active-high decoders or demultiplexers. They are multifunctional devices capable of storing single-line data in eight addressable latches and being a 1-of-8 decoder or demultiplexer with active-high outputs.
Four distinct modes of operation are selectable by controlling the clear (CLR) and enable (G) inputs as shown in the function table. In the No internal connection addressable-latch mode, data at the data-in terminal is written into the addressed latch. The addressed latch follows the data input with all unaddressed latches remaining in their previous states. In the memory mode, all latches remain in their previous states and are unaffected by the data or address inputs. To eliminate the possibility of entering erroneous data in the latches, G should be held high (inactive) while the address lines are changing. In the 1-of-8 decoding or demultiplexing mode, the addressed output follows the level of the D input with all other outputs low. In the clear mode, all outputs are low and unaffected by the address and data inputs. The SN54ALS259 is characterized for operation over the full military temperature range to 125°C. The SN74ALS259 is characterized for operation from to 70°C. Function Tables
FUNCTION INPUTS CLR OUTPUT OF ADDRESSED LATCH D QiO D L EACH OTHER OUTPUT QiO L FUNCTION Addressable latch Memory 8-line demultiplexer Clear
D = the level at the data input. QiO = the level 7 as appropriate) before the indicated steady-state input conditions were established.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.LATCH SELECTION SELECT INPUTS S1 S0 LATCH ADDRESSED
G D CLR 10, 7R This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages.
|Some Part number from the same manufacture Texas Instruments, Inc.|
|SN54ALS259J ti SN54ALS259, 8-Bit Addressable Latches|
|SN54ALS273FK Octal D-type Flip-flops With Clear|
|SN54ALS273J ti SN54ALS273, Octal D-type Flip-flops With Clear|
|SN54ALS27AFK Triple 3-input Positive-nOR GATEs|
|SN54ALS27AJ ti SN54ALS27A, Triple 3-Input Positive-nOR GATEs|
|SN54ALS27J ti SN54ALS27, Triple 3-Input Positive-nOR GATEs|
|SN54ALS29821 10-bit Bus-interface Flip-flops With 3-state Outputs|
|SN54ALS29823JT 9-bit Bus-interface Flip-flops With 3-state Outputs|
|SN54ALS299FK 8-bit Universal Shift/storage Registers With 3-state Outputs|
|SN54ALS299J ti SN54ALS299, 8-Bit Universal Shift/storage Registers With 3-State Outputs|
|SN54ALS30AFK 8-input Positive-nand Gates|
|SN54ALS30AJ ti SN54ALS30A, 8-Input Positive-nand Gates|
|SN54ALS323FK 8-bit Universal Shift/storage Registers With Synchronous Clear And 3-state Outputs|
|SN54ALS323J ti SN54ALS323, 8-Bit Universal Shift/storage Registers With Synchronous Clear And 3-ST Outputs|
BQ2002C : Power Nicd/nimh Fast-charge Management ic
LM393P : ti LM393, Dual, General Purpose Differential Comparator
MSP430F1111AIDGVR : Ultra-Low Power Microcontrollers ti MSP430F1111A, 16-bit Ultra-low-power Microcontroller, 2kB Flash, 128B RAM, Comparator
SN74ALS667DW : D-Type (3-State) Latches ti SN74ALS667, Octal D-type Transparent Read-back Latches With 3-State Outputs
SN74LVC540ADBLE : Inverting Buffers and Drivers ti SN74LVC540A, Octal Buffer/driver With 3-State Outputs
TPS76633 : Ultra Low Quiescent Current 250-ma Low-dropout Voltage Regulators
LT1004IDRE4-1-2 : Micropower Integrated Voltage References
OPA4171AIPWR : 36V, Low Power, RRO, General Purpose Operational Amplifier In MicroPackages The OPA171, OPA2171 and OPA4171 (OPAx171) are a family of 36V, single-supply, low-noise operational amplifiers with the ability to operate on supplies ranging from +2.7V (±1.35V) to +36V (±18V). These devices are available
F28M35H20C1RFPT : 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144 Specifications: Life Cycle Stage: ACTIVE ; Clock Speed: 20 MHz ; ROM Type: Flash ; Supply Voltage: 1.14 to 1.26 volts ; I/O Ports: 74 ; Package Type: Other, PLASTIC, HTQFP-144 ; Operating Range: Auto ; Pin Count: 144 ; Operating Temperature: -40 to 125 C (-40 to 257 F) ; Features: DMA, PWM
74F174 : Bipolar->F Family. Hex D Flip-flop With Master Reset. The is a high-speed hex D flip-flop The device is used primarily a 6-bit edge-triggered storage register The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition The device has a Master Reset to simultaneously clear all flip-flops Edge-triggered D-type inputs Buffered positive edge-triggered clock Asynchronous.
A3281LH : Chopper-stabilized, Precision Hall-effect Latches. The A3280--, A3281--, and A3283-- Hall-effect latches are extremely temperature-stable and stress-resistant sensors especially suited for operation over extended temperature ranges to +150°C. Superior high-temperature performance is made possible through dynamic offset cancellation, which reduces the residual offset voltage normally caused by device.
CY74FCT16827T : CMOS/BiCMOS->FCT/FCT-T Family. 20-bit Buffers/line Drivers. Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. These parts can be used as a single 20-bit buffer.
DM54191J : Synchronous Up/down 4-bit Binary Counter With Mode Control. DM54191 DM74191 Synchronous Up Down 4-Bit Binary Counter with Mode Control DM54191 DM74191 Synchronous Up Down 4-Bit Binary Counter with Mode Control This circuit is a synchronous reversible up down counter The a 4-bit binary counter Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change simultaneously.
HCTS163MS : CMOS/BiCMOS->4000 Family. Radiation Hardened Synchronous Counter. 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW 3 Micron Radiation Hardened CMOS SOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity x 10-9 Errors/Bit-Day (Typ) Dose Rate Survivability: x 1012 RAD (Si)/s Dose Rate Upset: >10 Latch-Up Free Under Any Conditions.
HEF4557BF : 1-to-64 Bit Variable Length Shift Register. For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family s HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC Product File under Integrated Circuits, IC04 January 1995 The is a static clocked serial shift register whose length may be programmed to be any number of bits between 1 and 64. The number.
KIC7S00FU : = 2 Input NAND Gate ;; Package = Usv.
LM6325N : High Speed Buffer. The LM6125 family of high speed unity gain buffers slew at 800 V/µs and have a small signal bandwidth of 50 MHz while driving a 50 load. These buffers drive 300 mA peak and do not oscillate while driving large capacitive loads. The LM6125 contains unique not found in power buffers; these include current limit, thermal shutdown, electronic shutdown,.
PI74SSTVF32852 : DDR-I, 24/48-Bit Registered Buffer - Lfbga Package. SSTVF32852 is designed for low-voltage operation, 2.5V for PC2700; 2.6V for PC3200 Supports SSTL_2 Class I s on outputs All Inputs are SSTL_2 Compatible, except RESET which is LVCMOS. Designed for DDR Memory Packaging: 114-Ball LFBGA (Lead-free package available) Pericom Semiconductor's PI74SSTVF32852 logic circuit is produced using the Company's advanced.
SL74HCT20 : Dual 4-input NAND Gate ( High-performance Silicon-gate CMOS ). The SL74HCT20 is identical in pinout to the LS/ALS20. The SL74HCT20 may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs. TTL/NMOS-Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 5.5 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices.
TC4521 : CMOS/BiCMOS->4000 Family. CMOS 24-stage Frequency Divider.
TC74ACT374FT : TC74ACT Series. Function = Octal D-type Flip-flop (3-state) ;; Pins = 20.
A2F500M3G-1FGG256Y : FPGA, 11520 CLBS, 500000 GATES, PBGA256. s: System Gates: 500000 ; Logic Cells / Logic Blocks: 11520 ; Package Type: Other, 1 MM PITCH, GREEN, FBGA-256 ; Logic Family: CMOS ; Pins: 256 ; Operating Temperature: 0 to 85 C (32 to 185 F) ; Supply Voltage: 1.5V.
XCV100-4HQG240C : FPGA, 600 CLBS, 108904 GATES, 250 MHz, PQFP240. s: Device Type: FPGA ; System Gates: 108904 ; Logic Cells / Logic Blocks: 600 ; Package Type: Other, HQ240 ; Pins: 240 ; Internal Frequency: 250 MHz ; Propagation Delay: 0.8000 ns ; Operating Temperature: 0 to 85 C (32 to 185 F) ; Supply Voltage: 2.5V.