|Category||Semiconductors => Space & High Reliability => Logic Products => Flip-Flop/Latch/Registers|
|Part family||SN54ALS174 Hex D-type Flip-Flops With Clear|
|Description||Hex D-type Flip-Flops With Clear 16-CDIP -55 to 125|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN54ALS174J datasheet
|Cross ref.||Similar parts: DM74ALS174N|
|Operating Temperature Range(C)||-55 to 125|
|Output Drive (IOL/IOH)(Max)(mA)||8/-0.4|
|F @ Nom Voltage(Max)(Mhz)||75|
|ICC @ Nom Voltage(Max)(mA)||19|
|tpd @ Nom Voltage(Max)(ns)||17|
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
|• Advanced Schottky (ALS and AS) Logic Families
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using | Doc
'ALS174 and 'AS174 Contain Six Flip-Flops With Single-Rail Outputs 'ALS175 and 'AS175B Contain Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct-Clear Inputs
Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Fully Buffered Outputs for Maximum Isolation From External Disturbances ('AS Only)description
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct-clear (CLR) input. The 'ALS175 and 'AS175B feature complementary outputs from each flip-flop. Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output. These circuits are fully compatible for use with most TTL circuits.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
TA PACKAGE ORDERABLE PART NUMBER SN74ALS174N PDIP N Tube SN74ALS175N SN74AS175BN Tube Tape and reel Tube to 70°C SOIC D Tape and reel Tube Tape and reel Tube Tape and reel SN74AS175BDR SN74ALS174NSR SOP NS Tape and reel SN74AS175BNSR SNJ54ALS174J CDIP J Tube to 125°C CFP W Tube SNJ54AS174FK SNJ54ALS175FK TOP-SIDE MARKING SNJ54ALS174FK SNJ54AS174FK
SNJ54ALS175FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. This orderable is not recommended for new designs. FUNCTION TABLE (each flip-flop) INPUTS CLR CLK OUTPUTS H Q0To Five Other Channels Pin numbers shown are for the J, N, NS, and W packages.
absolute maximum ratings over operating free-air temperature range, SN54/74ALS174, SN54/74ALS175 (unless otherwise noted)
Supply voltage, VCC. 7 V Input voltage, VI. 7 V Package thermal impedance, JA (see Note 1): D package. 73°C/W N package. 67°C/W NS package. 64°C/W Storage temperature range, Tstg. to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
SN54ALS174 SN54ALS175 MIN VCC VIH VIL IOH IOL TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Operating free-air temperature NOM 5 MAX SN74ALS174 SN74ALS175 MIN NOM 5 MAX mA °C UNIT
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
|Related products with the same datasheet|
|Some Part number from the same manufacture Texas Instruments, Inc.|
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|SN54ALS175J ti SN54ALS175, Quadruple D-type Flip-flops With Clear|
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|SN54ALS191AJ ti SN54ALS191A, Synchronous 4-Bit Up/down Binary Counter|
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|SN54ALS240AJ ti SN54ALS240A, Octal Buffers/drivers With 3-State Outputs|
|SN54ALS241BJ ti SN54ALS241B, Octal Buffers/drivers With 3-State Outputs|
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