Details, datasheet, quote on part number: M48T59-70PC6
PartM48T59-70PC6
CategoryMemory => SRAM
Description64 Kbit 8kb x8 Timekeeper SRAM
CompanyST Microelectronics, Inc.
DatasheetDownload M48T59-70PC6 datasheet
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Features, Applications

INTEGRATED ULTRA LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT and BATTERY FREQUENCY TEST OUTPUT for REAL TIME CLOCK SOFTWARE CALIBRATION AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage): M48T59: 4.5V VPFD M48T59Y: 4.2V VPFD M48T59V: 2.7V VPFD 3.0V

SELF-CONTAINED BATTERY and CRYSTAL in the CAPHAT DIP PACKAGE PACKAGING INCLUDES a 28-LEAD SOIC and SNAPHAT® TOP (to be Ordered Separately) SOIC PACKAGE PROVIDES DIRECT CONNECTION for a SNAPHAT TOP which CONTAINS the BATTERY and CRYSTAL MICROPROCESSOR POWER-ON RESET (Valid even during battery back-up mode) PROGRAMMABLE ALARM OUTPUT ACTIVE in the BATTERY BACK-UP MODE BATTERY LOW FLAG

A0-A12 DQ0-DQ7 IRQ/FT RST G W VCC VSS October 1999 Address Inputs Data Inputs / Outputs Interrupt / Frequency Test Output (Open Drain) Power Fail Reset Output (Open Drain) Chip Enable Output Enable Write Enable Supply Voltage Ground

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

Symbol TA TSTG TSLD (2) VIO VCC IO PD Parameter Ambient Operating Temperature Storage Temperature (VCC Off, Oscillator Off) Lead Solder Temperature for 10 seconds Input or Output Voltages Supply Voltage Output Current Power Dissipation M48T59/M48T59Y M48T59V Grade 1 Grade 6 Value 20 1 Unit mA W

Note: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect reliability. 2. Soldering temperature not to exceed 260°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds).

CAUTION: Negative undershoots below ­0.3V are not allowed on any pin while in the Battery Back-up mode. CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.

Mode Deselect Write Read Deselect VCC to 3.6V VSO to VPFD (min) VSO
Power Standby Active CMOS Standby Battery Back-up Mode
Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage. 2. See Table 7 for details.
x 8 SRAM ARRAY LITHIUM CELL VOLTAGE SENSE AND SWITCHING CIRCUITRY VPFD

DESCRIPTION The M48T59/59Y/59V TIMEKEEPER ® RAM 8Kb x8 non-volatile static RAM and real time clock. The monolithic chip is available in two special packages to provide a highly integrated battery backed-up memory and real time clock solution. The is a non-volatile pin and function equivalent to any JEDEC standard 8Kb x8 SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special write timing or limitations on the number of writes that can be performed. The 28 pin 600mil DIP CAPHATTM houses the M48T59/59Y/59V silicon with a quartz crystal and a long life lithium button cell in a single package. The 28 pin 330mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT housing containing the battery and crystal. The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process. Insertion of the SNAPHAT housing after reflow prevents potential battery and crystal damage due to the high temperatures required for device surfacemounting. The SNAPHAT housing is keyed to prevent reverse insertion.

Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages 3V 1.5V
Note that Output Hi-Z is defined as the point where data is no longer driven.

 

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