Details, datasheet, quote on part number: M48T559YMH
PartM48T559YMH
CategoryMemory => SRAM
Description64 Kbit 8kb x8 Timekeeper SRAM With Address/data Multiplexed
CompanyST Microelectronics, Inc.
DatasheetDownload M48T559YMH datasheet
  

 

Features, Applications
64 Kbit (8Kb x8) TIMEKEEPER® SRAM with ADDRESS/DATA MULTIPLEXED

SOFTWARE and HARDWARE RESET for WATCHDOG TIMER REGISTER COMPATIBLE with M48T59 TIMEKEEPER SRAM ADDRESS/DATA MULTIPLEXED I/O PINS WATCHDOG TIMER - MONITORS OUT of CONTROL PROCESSOR or HUNG BUS ALARM with WAKE-UP in BATTERY MODE INTEGRATED ULTRA LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT and BATTERY FREQUENCY TEST OUTPUT for REAL TIME CLOCK AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGE (VPFD = Power-fail Deselect Voltage): M48T559Y: 4.2V VPFD 4.5V PACKAGING INCLUDES a 28-LEAD SOIC and SNAPHAT® TOP (to be Ordered Separately) SOIC PACKAGE PROVIDES DIRECT CONNECTION for a SNAPHAT TOP CONTAINS the BATTERY and CRYSTAL MICROPROCESSOR POWER-ON RESET (Valid even during battery back-up mode) PROGRAMMABLE ALARM OUTPUT ACTIVE in the BATTERY BACK-UP MODE

DESCRIPTION The M48T559Y TIMEKEEPER ® RAM x 8 non-volatile static RAM and real time clock. The monolithic chip is available in the SNAPHAT package to provide a highly integrated battery backedup memory and real time clock solution. The 28 pin 330mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT housing containing the battery and crystal. The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process.

Figure 2. SOIC Connections Table 1. Signal Names

AD0-AD7 AS0-AS1 Address/Data Address Strobes Write Enable Read Enable Chip Enable Watchdog Input Reset Input Power Fail Reset Output (Open Drain) Interrupt / Frequency Test Output (Open Drain) Supply Voltage Ground Not Connected Internally Don't Use must be connected to VCC or VSS

Symbol TA TSTG VIO VCC IO PD Parameter Ambient Operating Temperature Storage Temperature (VCC Off, Oscillator Off) Input or Output Voltages Supply Voltage Output Current Power Dissipation Value 20 1 Unit mA W

Note: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect reliability.

CAUTION: Negative undershoots below ­0.3V are not allowed on any pin while in the Battery Back-up mode. CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.

Insertion of the SNAPHAT housing after reflow prevents potential battery and crystal damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is keyed to prevent reverse insertion. The SOIC and battery/crystal packages are shipped separately in plastic anti-static tubes or in Tape & Reel form. For the 28 lead SOIC, the battery/crystal package (i.e. SNAPHAT) part number is "M4T28-BR12SH1". Caution: Do not place the SNAPHAT battery/crystal top in conductive foam, as this will drain the lithium button-cell battery. As Figure 3 shows, the static memory array and the quartz controlled clock oscillator of the M48T559Y are integrated on one silicon chip. The

two circuits are interconnected at the upper eight memory locations to provide user accessible BYTEWIDETM clock information in the bytes with addresses 1FF8h-1FFFh. The clock locations contain the year, month, date, day, hour, minute, and second in 24 hour BCD format. Corrections for 28, 29 (leap year), 30, and 31 day months are made automatically. Byte 1FF8h is the clock control register. This byte controls user access to the clock information and also stores the clock calibration setting. The eight clock bytes are not the actual clock counters themselves; they are memory locations consisting of BiPORTTM read/write memory cells. The M48T559Y includes a clock control circuit which updates the clock bytes with current infor-

x 8 SRAM ARRAY LITHIUM CELL VOLTAGE SENSE AND SWITCHING CIRCUITRY VPFD

Mode Deselect Write Read Deselect VSO to VPFD (min) (2) VSO to 5.5V VCC E VIH VIL VIH VIL VIH VIL VIH X AD0-AD7 High Z DIN DOUT High Z High Z High Z Power Standby (3) Active CMOS Standby Battery Back-up Mode

Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage. 2. See Table 7 for details. AS0, AS1 active when E is high and VCC > V PFD.

mation once per second. The information can be accessed by the user in the same manner as any other location in the static memory array. The M48T559Y also has its own Power-fail Detect circuit. The control circuitry constantly monitors the single 5V supply for an out of tolerance condition.

When CC is out of tolerance, the circuit write protects the SRAM, providing a high degree of data security in the midst of unpredictable system operation brought on by low VCC. As VCC falls below approximately 3V, the control circuitry connects the battery which maintains data and clock operation until valid power returns.


 

Related products with the same datasheet
M48T559YMH1TR
M48T559YSH
Some Part number from the same manufacture ST Microelectronics, Inc.
M48T559YMH1TR 64 Kbit 8kb x8 Timekeeper SRAM With Address/data Multiplexed
M48T58 64 Kbit (8KB X 8) Timekeeper SRAM
M48T58-70MH1 64 Kbit 8kb x8 Timekeeper SRAM
M48T58V 64 Kbit (8KB X 8) Timekeeper SRAM
M48T58Y
M48T58Y-70MH1
M48T58Y-70MH1E
M48T58Y-70PC1
M48T58YMH 64 Kbit 8kb x8 Timekeeper SRAM
M48T59 64Kb (x8), 70ns, 5V R5%, 10 Year Battery**, Watchdog, Reset Output, Alarms, Battery Low Flag, Wake-up
M48T59-70MH1 64 Kbit 8kb x8 Timekeeper SRAM
M48T59Y 64 Kbit (8KB X8) Timekeeper SRAM
M48T59Y-70MH1
M48T59Y-70MH6 64 Kbit 8kb x8 Timekeeper SRAM
M48T59Y-70MH6E 64 Kbit (8KB X8) Timekeeper SRAM
M48T59Y-70MH6TR 64 Kbit 8kb x8 Timekeeper SRAM
M48T59Y-70PC1 64 Kbit (8KB X8) Timekeeper SRAM
M48T59Y-70PC1TR 64 Kbit 8kb x8 Timekeeper SRAM
M48T86 5 Volt PC Real Time Clock
M48T86MH 5v PC Real Time Clock
M48T86MH1 5 Volt PC Real Time Clock

LD1117XX25 : Low Drop Fixed And Adjustable Positive Voltage Regulators

PSD4235G3V-A-12MI : Flash In-system-programmable Peripherals For 16-bit MCUs

PSD953312JIT : Flash In-system Programmable Isp Peripherals For 8-bit MCUs

M27C4002-70B1TR : 4 Mbit (256kb x16) UV Eprom and OTP Eprom

PSD953F5V-12J : Flash In-system Programmable ISP Peripherals For 8-bit MCUs

STB30NM50N : Fet - Single Discrete Semiconductor Product 27A 500V 190W Surface Mount; MOSFET N-CH 500V 27A D2PAK Specifications: Mounting Type: Surface Mount ; FET Type: MOSFET N-Channel, Metal Oxide ; Drain to Source Voltage (Vdss): 500V ; Current - Continuous Drain (Id) @ 25° C: 27A ; Rds On (Max) @ Id, Vgs: 115 mOhm @ 13.5A, 10V ; Input Capacitance (Ciss) @ Vds: 2740pF @ 50V ; Power - Max: 190W ; Packaging:

STMUX1800LQTR : Interface - Analog Switches, Multiplexers, Demultiplexer Integrated Circuit (ics); IC MUX/DEMUX 16X8 56QFN Specifications: Lead Free Status: Lead Free ; RoHS Status: RoHS Compliant

ST72F561K7TCXS : 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 Specifications: Life Cycle Stage: ACTIVE ; Clock Speed: 16 MHz ; ROM Type: Flash ; Supply Voltage: 4.5 to 5.5 volts ; I/O Ports: 48 ; Package Type: TQFP, Other, 10 X 10 MM, PLASTIC, TQFP-64 ; Operating Range: Commercial ; Pin Count: 64 ; Operating Temperature: 0 to 70 C (32 to 158 F) ; Features: PWM

TS420-400T : 4 A, 400 V, SCR Specifications: VDRM: 400 volts ; VRRM: 400 volts ; IT(RMS): 4 amps ; IGT: 0.2000 mA ; Standards and Certifications: RoHS ; Package Type: DPAK, PLASTIC, DPAK-3 ; Pin Count: 2

Same catergory

CY7C1441V33-133AC : Standart Synchronous SRAM. Supports 133-MHz bus operations x 72 common I/O Fast clock-to-output times 6.5 ns (for 133-MHz device) 7.5 ns (for 117-MHz device) Single 3.3V ­5% and +5% power supply VDD Separate VDDQ for or 2.5V Byte Write Enable and Global Write control Burst Capability ­ linear or interleaved burst order Automatic power down available using ZZ mode or CE deselect.

EDI8F32259C : SRAM Modules. Organization = 256Kx32 ;; Speed (ns) = 15-35 ;; Volt = 5 ;; Package = 72 Simm ;; Temp = C ;;.

HYMD216M726L6 : 128 MB. 16Mx72 Bits Unbuffered DDR So-dimm. Hynix HYMD216M726(L)6-K/H/L series is unbuffered 200-pin double data rate Synchronous DRAM Small Outline Dual In-Line Memory Modules (SO-DIMMs) which are organized as 16Mx72 high-speed memory arrays. Hynix HYMD216M726(L)6-K/H/L series consists of five 16Mx16 DDR SDRAM in 400mil TSOP II packages a 200pin glassepoxy substrate. Hynix HYMD216M726(L)6-K/H/L.

HYS72D64020GU-7-B : 128MB - 2GB, 184pin. 2.5V 184Pin Unbuffered DDR-I SDRAM Modules & 512MByte Modules PC2700, PC3200 Data Sheet Revision 1.01 (Feb. 2003) 184Pin Unbuffered 8-Byte Dual-In-Line DDR-I SDRAM non-parity and ECC-Modules for PC and Server main memory applications One bank 64, 32Mx72 and two bank ´ 72 organization JEDEC standard Double Data Rate Synchronous DRAMs (DDR-I SDRAM) Single.

HYS72V32200GU-8 : 3.3 V 16m X 64/72-bit Sdram Modules 3.3 V 32m X 64/72-bit Sdram Modules 3.3 V 64m X 64/72-bit Sdram Modules.

IC62LV256L : . The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the s and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. High-speed access time: 20, 25 ns Automatic power-down when chip is deselected CMOS low power operation 255 mW (max.).

M14427EJ4V0DS00 : SRAM. The is a high speed, low power, 4,194,304 bits (1,048,576 words by 4 bits) CMOS static RAM. Operating supply voltage 0.3 V. The µPD444004L is packaged a 32-pin PLASTIC SOJ. 1,048,576 words by 4 bits organization Fast access time ns (MAX.) Output Enable input for easy application Single +3.3 V power supply Part number Package Access time ns (MAX.) Supply.

M14C32 : Memory Card ICs. Memory Card ic 64/32 Kbit Serial I2C Bus EePROM. Compatible with I2C Extended Addressing Two Wire I2C Serial Interface Supports 400 kHz Protocol Single Supply Voltage 5.5 V) Hardware Write Control BYTE and PAGE WRITE (up to 32 Bytes) BYTE, RANDOM and SEQUENTIAL READ Modes Self-Timed Programming Cycle Automatic Address Incrementing Enhanced ESD/Latch-Up Behaviour 1 Million Erase/Write Cycles (minimum).

M2V12D20TP : 512m Double Data Rate Synchronous DRAM. x 8-bit, double data rate synchronous DRAM, with SSTL_2 interface. All control and address signals are referenced to the rising edge of CLK. Input data is registered on both edges of data strobes, and output data and data strobe are referenced on both edges of CLK. The M2S12D20/30TP achieve very high speed data rate to 133MHz, and are suitable for main.

M377S6450BT3 : Registered DIMM. = M377S6450BT3 (Intel 1.2 Ver Base) 64Mx72 Sdram Dimm With PLL & Register Based on 64Mx4, 4Banks, 8K Ref., 3.3V Synchronous DRAMs With SPD ;; Density(MB) = 512 ;; Organization = 64Mx72 ;; Bank/ Interface = 4B/LVTTL ;; Refresh = 8K/64ms ;; Speed = IH,1L ;; #of Pin = 168 ;; Power = C ;; Component Composition = (64Mx4)x18+Drive ICx3+PLL+EEPROM.

M53210124CE2 : SIMM. = M53210124CE2 1MB X 32 DRAM Simm Using 1MB X 16, 1KB Refresh, 5V ;; Density(MB) = 4 ;; Organization = 1Mx32 ;; Mode = Fast Page ;; Refresh = 1K/16ms ;; Speed(ns) = 50,60 ;; #of Pin = 72 ;; Component Composition = (1Mx16)x2 ;; Production Status = Eol ;; Comments = Solder.

MR16R0828BS0 : Consumer RIMM. = MR16R0828BS0 (8M X 16) X 4(8)pcs Consumer RIMM(TM) Module Based on 128Mb B-die, 32s Banks,16K/32ms Ref, 2.5V ;; Density(MB) = 128 ;; Organization = 64Mx16 ;; Component Composition = (8Mx16)x8 ;; Voltage(V) = 2.5 ;; Refresh = 16K/32ms ;; Speed(MHz)/ TRAC(ns) = 300/53.3 ;; #of Pin = 184 ;; Production Status = Eol ;; Comments = Non-ecc,ss.

MT48LC128M4A2 : 512Mb: X4, X8, X16 Sdram, 54-pin Tsop. PC100- and PC133-compliant Fully synchronous; all signals registered on positive edge of system clock Internal pipelined operation; column address can be changed every clock cycle Internal banks for hiding row access/precharge Programmable burst lengths: or full page Auto Precharge, includes CONCURRENT AUTO PRECHARGE, and Auto Refresh Modes Self Refresh.

PSD933212JIT : Flash In-system Programmable Isp Peripherals For 8-bit MCUs. Flash In-System Programmable (ISP) Peripherals For 8-bit MCUs 2Mbit of Primary Flash Memory (8 uniform sectors, to 256Kbit Secondary Flash Memory (4 uniform sectors) to 256Kbit SRAM Over 3,000 Gates of PLD: DPLD and CPLD 27 Reconfigurable I/O ports Enhanced JTAG Serial Port Programmable power management High Endurance: ­ 100,000 Erase/WRITE Cycles of Flash.

M616Z08-20MH3E : 8K X 16 STANDARD SRAM, 36 ns, PDSO44. s: Memory Category: SRAM Chip ; Density: 131 kbits ; Number of Words: 8 k ; Bits per Word: 16 bits ; Package Type: SOIC, LEAD FREE, PLASTIC, SOIC-44 ; Pins: 44 ; Logic Family: CMOS ; Supply Voltage: 3.3V ; Access Time: 36 ns ; Operating Temperature: -40 to 125 C (-40 to 257 F).

 
0-C     D-L     M-R     S-Z