|Company||Philips Semiconductors (Acquired by NXP)|
|Datasheet||Download P83C562EBA datasheet
Product specification File under Integrated Circuits, IC20 1997 Apr 16
CONTENTS FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM FUNCTIONAL DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION MEMORY ORGANIZATION Program Memory Addressing I/O FACILITIES PULSE WIDTH MODULATED OUTPUTS Prescaler Frequency Control Register (PWMP) Pulse Width Register 0 (PWM0) Pulse Width Register 1 (PWM1) ANALOG-TO-DIGITAL CONVERTER (ADC) Analog input pins ADC Control Register (ADCON) TIMER/ COUNTERS Timer 0 and Timer 1 Timer T2 Capture and Compare Logic T2 Control Register (TM2CON) Capture Control Register (CTCON) Interrupt Flag Register (TM2IR) Set Enable Register (STE) Reset/Toggle Enable register (RTE) Watchdog Timer (T3) SERIAL I/O
INTERRUPT SYSTEM Interrupt Vectors Interrupt priority Interrupt Enable and Priority Registers Interrupt Enable Register 0 (IEN0) Interrupt Enable register 1 (IEN1) Interrupt priority register 0 (IP0) Interrupt Priority Register 1 (IP1) REDUCED POWER MODES Idle and Power-down operation Idle mode Power-down mode Power Control Register (PCON) OSCILLATOR CIRCUITRY RESET CIRCUITRY Power-on-reset INSTRUCTION SET LIMITING VALUES DC CHARACTERISTICS AC CHARACTERISTICS PACKAGE OUTLINES SOLDERING Introduction Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS
This I/O intensive device provides architectural enhancements to function as a controller in the field of automotive electronics, specifically engine management and gear box control. The P8xC562 contains a non-volatile 8 kbyte read only program memory, a volatile 256 byte read/write data memory, six 8-bit I/O ports, two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture and compare latches, a fourteen-source, two-priority-level, nested interrupt structure, an 8-input ADC, a dual DAC with pulse width modulated outputs, a serial interface (UART), a Watchdog Timer and on-chip oscillator and timing circuits. For systems that require extra capability, the P8xC562 can be expanded using standard TTL compatible memories and logic. The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45 two-byte and 17 three-byte. With a 16 MHz crystal, 58% of the instructions are executed 0.75 µs and in 1.5 µs. Multiply and divide instructions require 3 µs.
80C51 Central Processing Unit 8 kbytes ROM, expandable externally to 64 kbytes 256 bytes RAM, expandable externally to 64 kbytes Two standard 16-bit timer/counters An additional 16-bit timer/counter coupled to four capture registers and three compare registers An 8-bit ADC with 8 multiplexed analog inputs Two 8-bit resolution, Pulse Width Modulated outputs Five 8-bit I/O ports plus one 8-bit input port shared with analog inputs Full-duplex UART compatible with the standard 80C51 On-chip Watchdog Timer Oscillator frequency: to 16 MHz. 2 GENERAL DESCRIPTION
The P80C562/P83C562 (hereafter generally referred as P8xC562) single-chip 8-bit microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The P8xC562 has the same instruction set as the 80C51. Two versions of the derivative exist: With 8 kbytes mask-programmable ROM ROMless version of the P8xC562. 3 ORDERING INFORMATION PACKAGE TYPE NUMBER NAME P83C562EBA/nnn(2) P83C562EFA/nnn(2) Notes 1. ROMless type. 2. ROM coded type; nnn denotes the ROM code number. DESCRIPTIONFREQUENCY TEMPERATURE RANGE (°C) VERSION RANGE (MHz) to +85
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