Details, datasheet, quote on part number: MC14584BFR1
PartMC14584BFR1
CategoryLogic => Gates => Inverters Gates
DescriptionHex Schmitt Trigger , Package: Pdip, Pins=14
CompanyON Semiconductor
DatasheetDownload MC14584BFR1 datasheet
Cross ref.Similar parts: CD4069UB
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Features, Applications

The MC14584B Hex Schmitt Trigger is constructed with MOS P­channel and N­channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14584B may be used in place of the MC14069UB hex inverter for enhanced noise immunity to "square up" slowly changing waveforms.

PDIP­14 P SUFFIX CASE 646 MC14584BCP AWLYYWW SOIC­14 D SUFFIX CASE 751A 14584B AWLYWW 1

Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving Two Low­power TTL Loads or One Low­power Double Diode Protection on All Inputs Can Be Used to Replace MC14069UB For Greater Hysteresis, Use MC14106B which is Pin­for­Pin

Replacement for CD40106B and MM74Cl4 Schottky TTL Load over the Rated Temperature Range
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)

Symbol VDD Vin, Vout Iin, Iout PD TA Tstg TL Parameter DC Supply Voltage Range Input or Output Voltage Range (DC or Transient) Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note 3.) Ambient Temperature Range Storage Temperature Range Lead Temperature (8­Second Soldering) Value ­0.5 to VDD +150 260 Unit TSSOP­14 DT SUFFIX CASE 948G

14 584B ALYW SOEIAJ­14 F SUFFIX CASE 1 A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week

2. Maximum Ratings are those values beyond which damage to the device may occur. 3. Temperature Derating: Plastic "P and D/DW" Packages: ­ 7.0 mW/_C From To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high­impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Input Current Input Capacitance (Vin = 0) Quiescent Current (Per Package)

Total Supply Current (5.) (6.) (Dynamic plus Quiescent, Per Package) (CL pF on all outputs, all buffers switching) Hysteresis Voltage

4. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. 5. The formulas given are for the typical characteristics only 6. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL ­ 50) Vfk where: in µA (per package), CL in pF, V = (VDD ­ VSS) in volts, f in kHz is input frequency, and VH = VT+ ­ VT­ (But maximum variation VH is specified as less than VT + max VT ­ min).


 

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