Details, datasheet, quote on part number: MCM63D736TQ133
PartMCM63D736TQ133
CategoryUnsorted
DescriptionMCM63D736 128K X 36 Bit Synchronous Dual I/O, Dual Address SRAM
CompanyMotorola Semiconductor Products
DatasheetDownload MCM63D736TQ133 datasheet
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Features, Applications

x 36 Bit Synchronous Dual I/O, Dual Address SRAM

The a 4M­bit static random access memory, organized as 128K words of 36 bits. It features common data input and data output buffers and incorporates input and output registers on­board with high speed SRAM. The MCM63D736 allows the user to concurrently perform reads, writes, or pass­through cycles in combination on the two data ports. The two address ports (AX, AY) determine the read or write locations for their respective data ports (DQX, DQY). The synchronous design allows for precise cycle control with the use of an external single clock (K). All signal pins except output enables (GX, GY) are registered on the rising edge of clock (K). The pass­through feature allows data to be passed from one port to the other, in either direction. The PTX input must be asserted to pass data from port X to port Y. The PTY will likewise pass data from port Y to port X. A pass­through operation takes precedence over a read operation. For the case when AX and AY are the same, certain protocols are followed. If both ports are read, the reads occur normally. If one port is written and the other is read, the read from the array will occur before the data is written. If both ports are written, only the data on DQY will be written to the array. Single V ±5% Power Supply 133 MHz Maximum Clock Frequency Throughput of 4.8 Gigabits/Second Single Clock Operation Self­Timed Write Two Bi­Directional Data Buses Can be Configured as Separate I/O Pass­Through Feature Asynchronous Output Enables (GX, GY) LVTTL Compatible I/O Concurrent Reads and Writes 176­Pin TQFP Package



 

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