Details, datasheet, quote on part number: PDM4M4030S-12
CategoryMemory => SRAM => Modules => SRAM Module
Description64kx32 CMOS Static RAM Module
CompanyIXYS Corporation
DatasheetDownload PDM4M4030S-12 datasheet


Features, Applications

High-density 2 megabit Static RAM module Low profile 64-pin ZIP (Zig-zag In-line vertical Package), 64-pin SIMM or Angled SIMM (Single In-line Memory Module) Ultra fast access time: 10 ns (max.) Surface mounted plastic components on an epoxy laminate (FR-4) substrate Single 5V (10%) power supply Multiple VSS pins and decoupling capacitors for maximum noise immunity Inputs/outputs directly TTL compatible

The PDM4M4030 is packaged 64-pin FR-4 ZIP (Zig-zag In-line vertical Package), a 64-pin SIMM or Angled SIMM (Single In-line Memory Module). The ZIP configuration allows 64 pins to be placed on a package 3.65" long and 0.35" wide. At only 0.650" high, this low-profile package is ideal for systems with minimum board spacing. The SIMM configuration allows use of edge mounted sockets to secure the module. All inputs and outputs of the PDM4M4030 are TTL compatible and operate from a single 5V supply. Full asynchronous circuitry requires no clock or refresh for operation and provides equal access and cycle times for ease of use. Two identification pins (PD0 and PD1) are provided for applications in which different density versions of the module are used. In this way, the target system can read the respective levels of PD0 and PD1 to determine a 64K depth.

The x 32 static RAM module constructed on an epoxy laminate (FR-4) substrate using eight x 4 static RAMs in plastic SOJ packages. Availability of four chip select lines (one for each of two RAMs) provides byte access. Extremely fast speeds can be achieved due to the use of 256K Static RAMs fabricated in Paradigm's highperformance, high-reliability CMOS technology. The PDM4M4030 is available with access times as fast 10 ns with minimal power consumption.

Data Inputs/Outputs Addresses Chip Selects Write Enable Output Enable Depth Identification Power Ground No Connect

NOTE: 1. Pins 2 and 3 (PD0 and PD1) are read by the user to determine the density of the module. If PD0 reads OPEN and PD1 reads VSS then the module has a 64K depth.

Mode Deselect/ Power-down Read Write Deselect

Symbol VTERM TBIAS TSTG TA PT IOUT Rating Terminal Voltage with Respect to VSS Temperature Under Bias Storage Temperature Operating Temperature Power Dissipation DC Output Current Com'l. 1.0 50 Ind. 1.0 50 Unit W mA

NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Symbol VCC VSS Commercial Parameter Supply Voltage Supply Voltage Ambient Temperature Min. 4.75 0 Typ. 0 25 Max. 0 70 Unit V C


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