Details, datasheet, quote on part number: HIP4086AP
PartHIP4086AP
CategoryPower Management => broadband power
Description80V, 0.5A Three Phase Driver
CompanyIntersil Corporation
DatasheetDownload HIP4086AP datasheet
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Features, Applications

The is a Three Phase Bridge N-Channel MOSFET driver IC. The HIP4086 is specifically targeted for PWM motor control. It makes bridge based designs simple and flexible. Like the HIP4081, the HIP4086 has a flexible input protocol for driving every possible switch combination. Unlike the HIP4081, the user can override the shoot-through protection for switched reluctance applications. The HIP4086 has reduced drive current compared to the vs 2.5A) and a much wider range of programmable dead times 4.5s) - like the HIP4082. The HIP4086 is suitable for applications requiring to 100kHz. Unlike the previous family members, the HIP4086 has a programmable undervoltage set point. Also refer to the HIP4083, three phase upper only MOSFET driver, for a lower current solution optimized for smaller motors.

Features

Independently Drives 6 N-Channel MOSFETs in Three Phase Bridge Configuration Bootstrap Supply Max Voltage to 95VDC Bias Supply Operation from 15V 1.25A Peak Turn-Off Current User-Programmable Dead Time to 4.5s) Charge-Pump and Bootstrap Maintain Upper Bias Supplies Programmable Bootstrap Refresh Time Drives 1000pF Load with Typical Rise Time of 20ns and Fall Time of 10ns DIS (Disable) Overrides Input Control Input Logic Thresholds Compatible with to 15V Logic Levels Dead Time Disable Capability

PART NUMBER HIP4086AB HIP4086AP TEMP. RANGE (oC) to 125 PACKAGE 24 Ld SOIC 24 Ld PDIP PKG. NO. M24.3 E24.3

Applications
Switched Reluctance Motor Drives Battery Powered Vehicles

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003. All Rights Reserved All other trademarks mentioned are the property of their respective owners.

CHARGE PUMP 16 AHB AHI 5 DRIVER TURN-ON DELAY 10ns DELAY UV LEVEL SHIFTER UV DEAD TIME DISABLE 20 VDD DRIVER TURN-ON DELAY ALI RDEL 4 7 DEAD TIME CURRENT MIRRORS 100mV + VSS 2 s DELAY 21 ALO 6 DEAD TIME DISABLE VSS 17 AHO 18 AHS

TRUTH TABLE INPUT ALI, BLI, CLI X AHI, BHI, CHI UV X DIS 1 X RDEL X <100mV OUTPUT ALO, BLO, CLO AHO, BHO, CHO

+12V 1 BHB 2 BHI RDEL PWM INPUTS 3 BLI 4 ALI 5 AHI 6 VSS 7 RDEL 8 UVLO 9 RFSH RUV (OPTIONAL) CRFSH (OPTIONAL) FROM OPTIONAL OVERCURRENT LATCH 10 DIS 11 CLI 12 CHI BHO 24 BHS 23 BLO 22 ALO 21 VDD 20 CLO 19 AHS 18 AHO 17 AHB 16 CHS 15 CHO 14 CHB 13 GND

PIN NUMBER 1 13 SYMBOL AHB BHB CHB (xHB) AHI BHI CHI (xHI) DESCRIPTION High-Side Bootstrap supplies. One external bootstrap diode and one capacitor are required for each. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to each xHB pin.

High-Side Logic Level Inputs. Logic at these three pins controls the three high side output drivers, AHO (Pin 17), BHO (Pin 24) and CHO (Pin 14). When xHI is low, xHO is high. When xHI is high, xHO is low. Unless the dead time is disabled by connecting RDEL (Pin 7) to ground, the low side input of each phase will override the corresponding high side input on that phase - see Truth Table on previous page. If RDEL is tied to ground, dead time is disabled and the outputs follow the inputs. Care must be taken to avoid shoot-through in this application. DIS (Pin 10) also overrides the high side inputs. xHI can be driven by signal levels to 15V (no greater than VDD). Low-Side Logic Level Inputs. Logic at these three pins controls the three low side output drivers ALO (Pin 21), BLO (Pin 22) and CLO (Pin 19). If the upper inputs are grounded then the lower inputs control both xLO and xHO drivers, with the dead time set by the resistor at RDEL (Pin 7). DIS (Pin 10) high level input overrides xLI, forcing all outputs low. xLI can be driven by signal levels to 15V (no greater than VDD). Ground. Connect the sources of the Low-Side power MOSFETs to this pin. Dead Time Setting. Connect a resistor from this pin to VDD to set timing current that defines the dead time between drivers - see Figure 15. All drivers turn-off with no adjustable delay, so the RDEL resistor guarantees no shoot-through by delaying the turn-on of all drivers. When RDEL is tied to VSS, both upper and lowers can be commanded on simultaneously. While not necessary in most applications, a decoupling capacitor 0.1F or smaller may be connected between RDEL and VSS. Undervoltage Setting. A resistor can be connected between this pin and VSS to program the undervoltage set point, see Figure 16. With this pin not connected, the undervoltage disable is typically 6.6V. When this pin is tied to VDD, the undervoltage disable is typically 6.2V. Refresh Pulse Setting. An external capacitor can be connected from this pin SS to increase the length of the start up refresh pulse - see Figure 14. If this pin is not connected, the refresh pulse is typically 1.5s. Disable Input. Logic level input that when taken high sets all six outputs low. DIS high overrides all other inputs. With DIS low, the outputs are controlled by the other inputs. DIS can be driven by signal levels to 15V (no greater than VDD). High-Side Outputs. Connect to the gates of the High-Side power MOSFETs in each phase.

High-Side Source Connection. Connect the sources of the High-Side power MOSFETs to these pins. The negative side of the bootstrap capacitors should also be connected to these pins.

Positive Supply. Decouple this pin to VSS (Pin 6). Low-Side Outputs. Connect the gates of the Low-Side power MOSFETs to these pins.


 

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