Details, datasheet, quote on part number: IDT74FCT823ATSO
PartIDT74FCT823ATSO
CategoryLogic
Description9-BIT Register With Clear And 3-STATE
CompanyIntegrated Device Technology, Inc.
DatasheetDownload IDT74FCT823ATSO datasheet
Cross ref.Similar parts: SN74ABT823
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Features, Applications

The FCT823T series is built using an advanced dual metal CMOS technology. The FCT823T series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The a 9-bit wide buffered register with Clock Enable (EN) and Clear (CLR) ideal for parity bus interfacing in high-performance microprogrammed systems. The FCT823T high-performance interface family can drive large capacitive loads, while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes and all outputs are designed for lowcapacitance bus loading in high-impedance state.

A and C grades Low input and output leakage 1A (max.) CMOS power levels True TTL input and output compatibility: VOH = 3.3V (typ.) VOL = 0.3V (typ.) High Drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Power off disable outputs permit "live insertion" Available in the SOIC, SSOP, and QSOP packages

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

Symbol Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max to +120 Unit C mA

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Output and I/O terminals only.

Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF

NOTE: 1. This parameter is measured at characterization but not tested.

Pin Names Dx CLR I/O I Description D Flip-Flop Data Inputs When the clear input is LOW and OE is LOW, the Qx outputs are LOW. When the clear input is HIGH, data can be entered into the register. Clock Pulse for the Register; enters data into the register on the LOW-to-HIGH transition. Register 3-State Outputs Clock Enable. When the clock enable is LOW, data on the Dx output is transferred to the Qx output on the LOW-to-HIGH transition. When the clock enable is HIGH, the Qx outputs do not change state, regardless of the data or clock input transitions. Output Control. When the OE is HIGH, the Yx outputs are in the high-impedance state. When the OE is LOW, the TRUE register data is present at the Yx outputs.

OE CLR Inputs Dx CP Internal/ Outputs Z NC Function High Z Clear Hold Load

NOTE: H = HIGH Voltage Level X = Don't Care L = LOW Voltage Level = No Change = LOW-to-HIGH Transition Z = High Impedance

Following Conditions Apply Unless Otherwise Specified: Industrial: to +85C, VCC 5.0V 5%

Symbol VIH VIL IIH IIL IOZH IOZL II VIK VH ICC Input HIGH Current(4) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC = Max., VI = VCC (Max.) VCC = Min., IIN = 18mA Parameter Input HIGH Level Input LOW Level Input HIGH Current(4) Input LOW Current(4) High Impedance Output Current(4) Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max., VI = VCC (Max.) = 0.5V Min. 200 0.01 Max. mV mA Unit V A

Symbol VOH VOL IOS IOFF Parameter Output HIGH Voltage Output LOW Voltage Short Circuit Current Input/Output Power Off Leakage(5) VCC = Min VIN = VIH or VIL VCC = Min VIN = VIH or VIL VCC = Max., = GND(3) Test Conditions(1) IOH = 8mA IOH = 15mA IOL = 48mA Min. 60 Typ.(2) Max. 225 1 Unit mA A

NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. The test limit for this parameter 55C. 5. This parameter is guaranteed but not tested.


 

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