Details, datasheet, quote on part number: IDT74FCT534TE
PartIDT74FCT534TE
CategoryLogic => Registers => CMOS/BiCMOS->FCT/FCT-T Family
TitleCMOS/BiCMOS->FCT/FCT-T Family
DescriptionFast CMOS Octal D Register (3-state)
CompanyIntegrated Device Technology, Inc.
DatasheetDownload IDT74FCT534TE datasheet
  

 

Features, Applications

Low input and output leakage 1 A (max.) Extended commercial range to +85C CMOS power levels True TTL input and output compatibility VOH = 3.3V (typ.) VOL = 0.3V (typ.) Meets or exceeds JEDEC standard 18 specifications Product available in Radiation Tolerant and Radiation Enhanced versions Available in PDIP, SOIC, and QSOP packages Std., A, C and D speed grades High drive outputs (-15mA IOH, 48mA IOL)

The an 8-bit register built using an advanced dual metal CMOS technology. These registers consist of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. Input data meeting the set-up and hold time requirements of the D inputs is transferred to the Q outputs on the low-to-high transition of the clock input.

Symbol VTERM(2) VTERM(3) TSTG IOUT Rating Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max. to +120 Unit C mA

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Outputs and I/O terminals only.

Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF

NOTE: 1. This parameter is measured at characterization but not tested.

Pin Names QN OE Description D flip-flop data inputs Clock Pulse for the register. Enters data on LOW-toHIGH transition. 3-state outputs (TRUE) 3-state outputs (INVERTED) Active LOW 3-state Output Enable input (1) Outputs DN QN Internal QN NC

NOTE: H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance = No Change = LOW-to-HIGH transition

Following Conditions Apply Unless Otherwise Specified: Commercial: to +85C, VCC 5%

Symbol VIH VIL IIH IIL IOZH IOZL II VIK VH ICC Parameter Input HIGH Level Input LOW Level Input HIGH Current(4) Input LOW Current(4) High Impedance Output Current (3-State Output pins)(4) Input HIGH Current(4) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = Max., VI = VCC (Max.) VCC = Min., IIN = 18mA VCC = Max., VIN = GND or VCC = Max. Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. = 0.5V Min. 200 0.01 Max. mV mA

Symbol VOH VOL IOS Parameter Output HIGH Voltage Output LOW Voltage Short Circuit Current VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL VCC = Max., = GND(3) Test Conditions(1) IOH = 8mA IOH = 15mA IOL = 48mA Min. 60 Typ.(2) Max. V mA Unit V

NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter = 55C.


 

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