Details, datasheet, quote on part number: IDT54FCT162823CTPFB
CategoryLogic => Registers
DescriptionFast CMOS 18-bit Register
CompanyIntegrated Device Technology, Inc.
DatasheetDownload IDT54FCT162823CTPFB datasheet
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Features, Applications

Common features: 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) 250ps Low input and output leakage 1 A (max.) ESD > 2000V per MIL-STD-883, Method > 200V using machine model 0) Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack Extended commercial range +85C VCC 5V 10% Features for FCT16823AT/BT/CT/ET: High drive outputs (-32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) 1.0V at VCC = 25C Features for FCT162823AT/BT/CT/ET: Balanced Output Drivers: 24mA (commercial), 16mA (military) Reduced system switching noise Typical VOLP (Output Ground Bounce) 0.6V at VCC = 25C

The FCT16823AT/BT/CT/ET and ET 18-bit bus interface registers are built using advanced, dual metal CMOS technology. These high-speed, low-power registers with clock enable (xCLKEN) and clear (xCLR) controls are ideal for parity bus interfacing in high-performance synchronous systems. The control inputs are organized to operate the device as two 9-bit registers or one 18-bit register. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16823AT/BT/CT/ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. The FCT162823AT/BT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The FCT162823AT/BT/CT/ET are plug-in replacements for the FCT16823AT/BT/CT/ET and ABT16823 for on-board interface applications.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

Pin Names xDx xCLK xCLKEN xCLR xOE xQx Description Data inputs Clock Inputs Clock Enable Inputs (Active LOW) Asynchronous clear Inputs (Active LOW) Output Enable Inputs (Active LOW) 3-State Outputs

xOE xCLR Inputs xCLKEN xCLK X xDx Outputs xQx Function L Q(2) High Z Clear Hold Load

Symbol Description Max. VTERM(2) Terminal Voltage with Respect to +7.0 GND VTERM(3) Terminal Voltage with Respect 0.5 to GND VCC +0.5 TSTG Storage Temperature +150 I OUT DC Output Current to +120

NOTES: 2772 tbl H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance 2. Output level before indicated steady-state input conditions were established.

Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 Max. Unit pF 8.0

2772 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals for FCT162XXXT.

2772 lnk 04 NOTE: 1. This parameter is measured at characterization but not tested.


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