Details, datasheet, quote on part number: GM71VS65800CCL-6
PartGM71VS65800CCL-6
CategoryMemory => DRAM => EDO/FPM DRAM => 64 Mb => EDO/FP
Description
CompanyHynix Semiconductor
DatasheetDownload GM71VS65800CCL-6 datasheet
  

 

Features, Applications

Description

The GM71V65800C is the second generation dynamic RAM organized 8,388,608 words by 8 bits. The GM71V65800C utilizes 0.35um CMOS Silicon Gate Process Technology as well as advanced circuit techniques for wide operating margins, both internally and to the system user. System oriented features include single power supply 3.3V+/- 0.3V tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. The GM71V65800C offers Fast Page Mode as a high speed access mode.

Features
8,388,604 Words x 8 Bit Fast Page Mode Capability Fast Access Time & Cycle Time

Low Power - Active 360 mW (MAX) - Standby mW ( CMOS level :MAX RAS Only Refresh, CAS before RAS Refresh, Hidden Refresh Capability LVTTL 4096 Refresh Cycles/64 ms Single Power Supply 3.3V+/- 0.3V with a built-in VBB generator

* This Data Sheet is subject to change without notice.

Pin A0-A11 RAS CAS OE Function Address Inputs Refresh Address Inputs Row Address Strobe Column Address Strobe Output Enable Pin - I/O7 VCC VSS NC Function Write Enable Data Input / Data Output Power (+3.3V) Ground No Connection

Type No. GM71V65800CT-6 GM71V65800CT-7 Access Time 60ns 70ns Package 400 Mil 32Pin Plastic SOJ 400 Mil 32Pin Plastic TSOP II

Symbol TA TSTG VIN/VOUT VCC IOUT PD Parameter Ambient Temperature under Bias Storage Temperature (Plastic) Voltage on any Pin Relative to VSS Voltage on VCC Relative to VSS Short Circuit Output Current Power Dissipation Rating -0.5 to VCC + 0.5 (MAX 50 1.0 Unit mA W

*Note : Operation at or above Absolute Maximum Ratings can adversely affect device reliability.

Symbol VCC VIH VIL Parameter Supply Voltage Input High Voltage Input Low Voltage Min 2.0 -0.3 Typ 3.3 Max Vcc+0.3 0.8 Unit V

Symbol VOH VOL ICC1 Parameter Output Level Output "H" Level Voltage (IOUT = -2mA) Output Level Output "L" Level Voltage (IOUT = 2mA) Operating Current Average Power Supply Operating Current (RAS, CAS Cycling: tRC = tRC min) Standby Current (TTL) Power Supply Standby Current (RAS, CAS = VIH, DOUT = High-Z) RAS-Only Refresh Current Average Power Supply Current RAS-Only Refresh Mode (RAS Cycling, CAS = VIH, tRC = tRC min) Fast Page Mode Current Average Power Supply Current Fast Page Mode (RAS = VIL, CAS, Address Cycling: tPC = tPC min) Standby Current (CMOS) Power Supply Standby Current (RAS, CASí ├ VCC-0.2V, DOUT = High-Z) CAS-before-RAS Refresh Current (tRC = tRC min) 70ns ICC7 Standby Current RAS = VIH CAS = VIL DOUT = Enable 70ns ICC2 Min 2.4 Max 1, 2 Unit V Note

Input Leakage Current, Any Input (0Ví ┬ VINí ┬ Vcc) Output Leakage Current (DOUT is Disabled, 0Ví ┬ VOUTí ┬ Vcc)

Note: 1. ICC depends on output load condition when the device is selected. ICC(max) is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Address can be changed once or less while CAS = VIH. Rev / Apr'01


 

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