Details, datasheet, quote on part number: GM71VS65163C/CLJ-6
PartGM71VS65163C/CLJ-6
CategoryMemory => DRAM => EDO/FPM DRAM => 64 Mb
Description
CompanyHynix Semiconductor
DatasheetDownload GM71VS65163C/CLJ-6 datasheet
  

 

Features, Applications

Description

The GM71V(S)65163C/CL is the new generation dynamic RAM organized 4,196,304 words by 16 bits. The GM71V(S)65163C/CL utilizes advanced CMOS Silicon Gate Process Technology as well as advanced circuit techniques for wide operating margins, both internally and to the system user. System oriented features include single power supply of 3.3V+/-10% tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. The GM71V(S)65163C/CL offers Extended Data Out(EDO) Mode as a high speed access mode.

Features

* 4,196,304 Words x 16 Bit * Extended Data Out (EDO) Mode Capability * Fast Access Time & Cycle Time (Unit: ns)

*Power dissipation - Active 540mW/504mW(MAX) - Standby mW ( CMOS level : MAX 0.54mW ( L-Version : MAX) *EDO page mode capability *Access time : 50ns/60ns (max) *Refresh cycles - RAS only Refresh cycles/128ms (GM71VS65163CL)(L_Version) *CBR & Hidden Refresh ms (GM71VS65163CL)( L-Version ) *4 variations of refresh -RAS-only refresh -CAS-before-RAS refresh -Hidden refresh -Self refresh (L-Version) *Single Power Supply 3.3V+/-10 % with a built-in VBB generator *Battery Back Up Operation ( L-Version ) Rev / Apr'01

Pin A0-A11 RAS UCAS,LCAS OE Function Address Inputs Refresh Address Inputs Row Address Strobe Column Address Strobe Output Enable Pin - I/O15 VCC VSS NC Function Write Enable Data Input / Output Power (+3.3V) Ground No Connection

Type No. GM71V(S)65163C/CLT-5 GM71V(S)65163C/CLT-6 Access Time 50ns 60ns Package 400 Mil 50Pin Plastic SOJ 400 Mil 50Pin Plastic TSOP II

Symbol TSTG VT VCC IOUT PT Parameter Storage Temperature (Plastic) Voltage on any Pin Relative to VSS Voltage on VCC Relative to VSS Short Circuit Output Current Power Dissipation Rating -0.5 to VCC + 0.5 (MAX 50 1.0 Unit mA W

*Note : Operation at or above Absolute Maximum Ratings can adversely affect device reliability.

Symbol VCC VSS VIH VIL TA Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Ambient Temperature under Bias Min Typ 3.3 0 Max 0.8 70 Unit Notes

Symbol VOH VOL ICC1 Parameter Output Level Output Level Voltage (IOUT = -2mA) Output Level Output Level Voltage (IOUT = 2mA) Operating Current (tRC = tRC min) 60ns ICC2 Standby Current (TTL interface) Power Supply Standby Current (RAS, UCAS,LCAS= VIH, DOUT = High-Z) RAS-Only Refresh Current ( tRC = tRC min) Extended Data Out page Mode Current (RAS = VIL, CAS, Address Cycling: tHPC = tHPC min) CMOS interface (RAS, UCAS,LCAS>=VCC-0.2V, DOUT = HighZ) Standby Current(L_Version) CAS-before-RAS Refresh Current (tRC = tRC min) 50ns 60ns Min 2.4 0 Max VCC mA Unit Note mA 1,2

Battery Back Up Operating Current(Standby with CBR) (tRC=31.25us,,tRAS=300ns,Dout=High-Z) Standby Current (CMOS) Power Supply Standby Current RAS = VIH,UCAS, LCAS = VIL , DOUT = Enable Self Refresh Current (RAS,UCAS,LCAS <=0.2V,Dout=High-Z) Input Leakage Current, Any Input (0V<=VIN<=Vcc) Output Leakage Current (DOUT is Disabled, 0V<=VOUT<=Vcc)

Note: 1. ICC depends on output load condition when the device is selected. ICC(max) is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Measured with one sequential address change per EDO cycle, tHPC. 0V<=VIL<=0.2V 5. L-Version


 

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